Multiple Choice Questions & Answers on Memory Management

Multiple Choice Questions & Answers on Memory Management

Memory Management MCQ 

1. The address of a page table in memory is pointed by ____________

a) stack pointer

b) page table base register

c) page register

d) program counter

Answer: page table base register


2. Run time mapping from virtual to physical address is done by ____________

a) Memory management unit

b) CPU

c) PCI

d) None of the mentioned

Answer: Memory management unit

Software Architect's >>


3. Operating System maintains the page table for ____________

a) each process

b) each thread

c) each instruction

d) each address

Answer: each process


4. The page table contains ____________

a) base address of each page in physical memory

b) page offset

c) page size

d) none of the mentioned

Answer: base address of each page in physical memory


5. CPU fetches the instruction from memory according to the value of ____________

a) program counter

b) status register

c) instruction register

d) program status word

Answer: program counter


6. Program always deals with ____________

a) logical address

b) absolute address

c) physical address

d) relative address

Answer: logical address


7. A memory buffer used to accommodate a speed differential is called ____________

a) stack pointer

b) cache

c) accumulator

d) disk buffer

Answer: cache


8. What is compaction?

a) a technique for overcoming internal fragmentation

b) a paging technique

c) a technique for overcoming external fragmentation

d) a technique for overcoming fatal error

Answer: a technique for overcoming external fragmentation


9. Which one of the following is the address generated by CPU?

a) physical address

b) absolute address

c) logical address

d) none of the mentioned

Answer: logical address


10. Memory management technique in which system stores and retrieves data from secondary storage for use in main memory is called?

a) fragmentation

b) paging

c) mapping

d) none of the mentioned

Answer: paging


Memory Management Swapping Processes MCQ 

1. The size of a process is limited to the size of ____________

a) physical memory

b) external storage

c) secondary storage

d) none of the mentioned

Answer: physical memory


2. The backing store is generally a ____________

a) fast disk

b) disk large enough to accommodate copies of all memory images for all users

c) disk to provide direct access to the memory images

d) all of the mentioned

Answer: all of the mentioned


3. Swap space is allocated ____________

a) as a chunk of disk

b) separate from a file system

c) into a file system

d) all of the mentioned

Answer: as a chunk of disk


4. Swapping requires a _________

a) motherboard

b) keyboard

c) monitor

d) backing store

Answer: backing store


5. The base register is also known as the ____________

a) basic register

b) regular register

c) relocation register

d) delocation register

Answer: relocation register


6. The run time mapping from virtual to physical addresses is done by a hardware device called the ____________

a) Virtual to physical mapper

b) Memory management unit

c) Memory mapping unit

d) None of the mentioned

Answer: Memory management unit


7. Binding of instructions and data to memory addresses can be done at ____________

a) Compile time

b) Load time

c) Execution time

d) All of the mentioned

Answer: All of the mentioned


8. In a system that does not support swapping ____________

a) the compiler normally binds symbolic addresses (variables) to relocatable addresses

b) the compiler normally binds symbolic addresses to physical addresses

c) the loader binds relocatable addresses to physical addresses

d) binding of symbolic addresses to physical addresses normally takes place during execution

Answer: the compiler normally binds symbolic addresses (variables) to relocatable addresses


9. The address loaded into the memory address register of the memory is referred to as ____________

a) Physical address

b) Logical address

c) Neither physical nor logical

d) None of the mentioned

Answer: Physical address


10. If the process can be moved during its execution from one memory segment to another, then binding must be ____________

a) delayed until run time

b) preponed to compile time

c) preponed to load time

d) none of the mentioned

Answer: delayed until run time


11. The address generated by the CPU is referred to as ____________

a) Physical address

b) Logical address

c) Neither physical nor logical

d) None of the mentioned

Answer: Logical address


12. The idea of overlays is to ____________

a) data that are needed at any given time

b) enable a process to be larger than the amount of memory allocated to it

c) keep in memory only those instructions

d) all of the mentioned

Answer: all of the mentioned


13. Swapping _______ be done when a process has pending I/O, or has to execute I/O operations only into operating system buffers.

a) must

b) can

c) must never

d) maybe

Answer: must never


14. The ___________ swaps processes in and out of the memory.

a) Memory manager

b) CPU

c) CPU manager

d) User

Answer: Memory manager


15. The ________ consists of all processes whose memory images are in the backing store or in memory and are ready to run.

a) wait queue

b) ready queue

c) cpu

d) secondary storage

Answer: ready queue


16. If binding is done at assembly or load time, then the process _____ be moved to different locations after being swapped out and in again.

a) can

b) must

c) can never

d) may

Answer: can never


17. The ___________ must design and program the overlay structure.

a) programmer

b) system architect

c) system designer

d) none of the mentioned

Answer: programmer


18. The major part of swap time is _______ time.

a) waiting

b) transfer

c) execution

d) none of the mentioned

Answer: transfer


19. If execution time binding is being used, then a process ______ be swapped to a different memory space.

a) has to be

b) can never

c) must

d) may

Answer: may


20. The _________ time in a swap out of a running process and swap in of a new process into the memory is very high.

a) context – switch

b) waiting

c) execution

d) all of the mentioned

Answer: context – switch


21. If a higher priority process arrives and wants service, the memory manager can swap out the lower priority process to execute the higher priority process. When the higher priority process finishes, the lower priority process is swapped back in and continues execution. This variant of swapping is sometimes called?

a) priority swapping

b) pull out, push in

c) roll out, roll in

d) none of the mentioned

Answer: roll out, roll in


22. What is Address Binding?

a) going to an address in memory

b) locating an address with the help of another address

c) binding two addresses together to form a new address in a different memory space

d) a mapping from one address space to another

Answer: a mapping from one address space to another


23. What is Dynamic loading?

a) loading multiple routines dynamically

b) loading a routine only when it is called

c) loading multiple routines randomly

d) none of the mentioned

Answer: loading a routine only when it is called


24. Which of the following is TRUE?

a) Overlays are used to increase the size of physical memory

b) Overlays are used to increase the logical address space

c) When overlays are used, the size of a process is not limited to the size of the physical memory

d) Overlays are used whenever the physical address space is smaller than the logical address space

Answer: When overlays are used, the size of a process is not limited to the size of the physical memory


25. What is the advantage of dynamic loading?

a) A used routine is used multiple times

b) An unused routine is never loaded

c) CPU utilization increases

d) All of the mentioned

Answer: An unused routine is never loaded


Memory Management Paging MCQ

1. Smaller page tables are implemented as a set of _______

a) queues

b) stacks

c) counters

d) registers

Answer: registers


2. When the valid – invalid bit is set to valid, it means that the associated page ____________

a) is in the TLB

b) has data in it

c) is in the process’s logical address space

d) is the system’s physical address space

Answer: is in the process’s logical address space


3. When there is a large logical address space, the best way of paging would be ____________

a) not to page

b) a two level paging algorithm

c) the page table itself

d) all of the mentioned

Answer: a two level paging algorithm


4. Physical memory is broken into fixed-sized blocks called ________

a) frames

b) pages

c) backing store

d) none of the mentioned

Answer: frames


5. Logical memory is broken into blocks of the same size called _________

a) frames

b) pages

c) backing store

d) none of the mentioned

Answer: pages


6. In paged memory systems, if the page size is increased, then the internal fragmentation generally ____________

a) becomes less

b) becomes more

c) remains constant

d) none of the mentioned

Answer: becomes more


7. To obtain better memory utilization, dynamic loading is used. With dynamic loading, a routine is not loaded until it is called. For implementing dynamic loading ____________

a) special support from hardware is required

b) special support from operating system is essential

c) special support from both hardware and operating system is essential

d) user programs can implement dynamic loading without any special support from hardware or operating system

Answer: user programs can implement dynamic loading without any special support from hardware or operating system


8. Every address generated by the CPU is divided into two parts. They are ____________

a) frame bit & page number

b) page number & page offset

c) page offset & frame bit

d) frame offset & page offset

Answer: page number & page offset


9. The percentage of times a page number is found in the TLB is known as ____________

a) miss ratio

b) hit ratio

c) miss percent

d) none of the mentioned

Answer: hit ratio


10. Illegal addresses are trapped using the _____ bit.

a) error

b) protection

c) valid – invalid

d) access

Answer: valid – invalid


11. Memory protection in a paged environment is accomplished by ____________

a) protection algorithm with each page

b) restricted access rights to users

c) restriction on page visibility

d) protection bit with each page

Answer: protection bit with each page


12. The size of a page is typically ____________

a) varied

b) power of 2

c) power of 4

d) none of the mentioned

Answer: power of 2


13. The page table registers should be built with _______

a) very low speed logic

b) very high speed logic

c) a large memory space

d) none of the mentioned

Answer: very high speed logic


14. For every process there is a __________

a) page table

b) copy of page table

c) pointer to page table

d) all of the mentioned

Answer: page table


15. Time taken in memory access through PTBR is ____________

a) extended by a factor of 3

b) extended by a factor of 2

c) slowed by a factor of 3

d) slowed by a factor of 2

Answer: slowed by a factor of 2


16. Each entry in a translation lookaside buffer (TLB) consists of ____________

a) key

b) value

c) bit value

d) constant

Answer: key


17. If a page number is not found in the TLB, then it is known as a ____________

a) TLB miss

b) Buffer miss

c) TLB hit

d) All of the mentioned

Answer: TLB miss


18. An ______ uniquely identifies processes and is used to provide address space protection for that process.

a) address space locator

b) address space identifier

c) address process identifier

d) none of the mentioned

Answer: address space identifier


18. The operating system maintains a ______ table that keeps track of how many frames have been allocated, how many are there, and how many are available.

a) page

b) mapping

c) frame

d) memory

Answer: frame


19. If the size of logical address space is 2 to the power of m, and a page size is 2 to the power of n addressing units, then the high order _____ bits of a logical address designate the page number, and the ____ low order bits designate the page offset.

a) m, n

b) n, m

c) m – n, m

d) m – n, n

Answer: m – n, n


20. For larger page tables, they are kept in main memory and a __________ points to the page table.

a) page table base register

b) page table base pointer

c) page table register pointer

d) page table base

Answer: page table base register


21. The _____ table contains the base address of each page in physical memory.

a) process

b) memory

c) page

d) frame

Answer: page


22. Paging increases the ______ time.

a) waiting

b) execution

c) context – switch

d) all of the mentioned

Answer: context – switch


23. The __________ is used as an index into the page table.

a) frame bit

b) page number

c) page offset

d) frame offset

Answer: page number


24. With paging there is no ________ fragmentation.

a) internal

b) external

c) either type of

d) none of the mentioned

Answer: external


25. In a paged memory, the page hit ratio is 0.35. The required to access a page in secondary memory is equal to 100 ns. The time required to access a page in primary memory is 10 ns. The average time required to access a page is?

a) 3.0 ns

b) 68.0 ns

c) 68.5 ns

d) 78.5 ns

Answer: 68.5 ns


Memory Management Segmentation MCQ 

1. The segment limit contains the ____________

a) starting logical address of the process

b) starting physical address of the segment in memory

c) segment length

d) none of the mentioned

Answer: segment length


2. If the offset is legal ____________

a) it is used as a physical memory address itself

b) it is subtracted from the segment base to produce the physical memory address

c) it is added to the segment base to produce the physical memory address

d) none of the mentioned

Answer: it is used as a physical memory address itself


3. The segment base contains the ____________

a) starting logical address of the process

b) starting physical address of the segment in memory

c) segment length

d) none of the mentioned

Answer: starting physical address of the segment in memory


4. In segmentation, each address is specified by ____________

a) a segment number & offset

b) an offset & value

c) a value & segment number

d) a key & value

Answer: a segment number & offset


5. Each entry in a segment table has a ____________

a) segment base

b) segment peak

c) segment value

d) none of the mentioned

Answer: segment base


6. The protection bit is 0/1 based on ____________

a) write only

b) read only

c) read – write

d) none of the mentioned

Answer: read – write


7. The offset ‘d’ of the logical address must be ____________

a) greater than segment limit

b) between 0 and segment limit

c) between 0 and the segment number

d) greater than the segment number

Answer: between 0 and segment limit


8. When the entries in the segment tables of two different processes point to the same physical location ____________

a) the segments are invalid

b) the processes get blocked

c) segments are shared

d) all of the mentioned

Answer: segments are shared


9. A multilevel page table is preferred in comparison to a single level page table for translating virtual address to physical address because ____________

a) it reduces the memory access time to read or write a memory location

b) it helps to reduce the size of page table needed to implement the virtual address space of a process

c) it is required by the translation lookaside buffer

d) it helps to reduce the number of page faults in page replacement algorithms

Answer: it helps to reduce the size of page table needed to implement the virtual address space of a process


10. If there are 32 segments, each of size 1Kb, then the logical address should have ____________

a) 13 bits

b) 14 bits

c) 15 bits

d) 16 bits

Answer: 13 bits


11. In paging the user provides only ________ which is partitioned by the hardware into ________ and ______

a) one address, page number, offset

b) one offset, page number, address

c) page number, offset, address

d) none of the mentioned

Answer: one address, page number, offset


12. Consider a computer with 8 Mbytes of main memory and a 128K cache. The cache block size is 4 K. It uses a direct mapping scheme for cache management. How many different main memory blocks can map onto a given physical cache block?

a) 2048

b) 256

c) 64

d) 8

Answer: 64


Memory Management Memory Allocation MCQ

1. The disadvantage of moving all process to one end of memory and all holes to the other direction, producing one large hole of available memory is ____________

a) the cost incurred

b) the memory used

c) the CPU used

d) all of the mentioned

Answer: the cost incurred


2. The relocation register helps in ____________

a) providing more address space to processes

b) a different address space to processes

c) to protect the address spaces of processes

d) none of the mentioned

Answer: to protect the address spaces of processes


3. The main memory accommodates ____________

a) operating system

b) cpu

c) user processes

d) all of the mentioned

Answer: operating system


4. In contiguous memory allocation ____________

a) each process is contained in a single contiguous section of memory

b) all processes are contained in a single contiguous section of memory

c) the memory space is contiguous

d) none of the mentioned

Answer: each process is contained in a single contiguous section of memory


5. The operating system and the other processes are protected from being modified by an already running process because ____________

a) they are in different memory spaces

b) they are in different logical addresses

c) they have a protection algorithm

d) every address generated by the CPU is being checked against the relocation and limit registers

Answer: every address generated by the CPU is being checked against the relocation and limit registers


6. Transient operating system code is code that ____________

a) is not easily accessible

b) comes and goes as needed

c) stays in the memory always

d) never enters the memory space

Answer: comes and goes as needed


7. When memory is divided into several fixed sized partitions, each partition may contain ________

a) exactly one process

b) at least one process

c) multiple processes at once

d) none of the mentioned

Answer: exactly one process


8. In fixed size partition, the degree of multiprogramming is bounded by ___________

a) the number of partitions

b) the CPU utilization

c) the memory size

d) all of the mentioned

Answer: the number of partitions


9. The first fit, best fit and worst fit are strategies to select a ______

a) process from a queue to put in memory

b) processor to run the next process

c) free hole from a set of available holes

d) all of the mentioned

Answer: free hole from a set of available holes


10. In internal fragmentation, memory is internal to a partition and ____________

a) is being used

b) is not being used

c) is always used

d) none of the mentioned

Answer: is not being used


11. A solution to the problem of external fragmentation is ____________

a) compaction

b) larger memory space

c) smaller memory space

d) none of the mentioned

Answer: compaction


12. Another solution to the problem of external fragmentation problem is to ____________

a) permit the logical address space of a process to be noncontiguous

b) permit smaller processes to be allocated memory at last

c) permit larger processes to be allocated memory at last

d) all of the mentioned

Answer: permit the logical address space of a process to be noncontiguous


13. If relocation is static and is done at assembly or load time, compaction _________

a) cannot be done

b) must be done

c) must not be done

d) can be done

Answer: cannot be done


14. Sometimes the overhead of keeping track of a hole might be ____________

a) larger than the memory

b) larger than the hole itself

c) very small

d) all of the mentioned

Answer: larger than the hole itself


15. When the memory allocated to a process is slightly larger than the process, then ____________

a) internal fragmentation occurs

b) external fragmentation occurs

c) both internal and external fragmentation occurs

d) neither internal nor external fragmentation occurs

Answer: internal fragmentation occurs


16. With relocation and limit registers, each logical address must be _______ the limit register.

a) less than

b) equal to

c) greater than

d) none of the mentioned

Answer: less than


17. Using transient code, _______ the size of the operating system during program execution.

a) increases

b) decreases

c) changes

d) maintains

Answer: changes


18. __________ is generally faster than _________ and _________

a) first fit, best fit, worst fit

b) best fit, first fit, worst fit

c) worst fit, best fit, first fit

d) none of the mentioned

Answer: first fit, best fit, worst fit


18. External fragmentation will not occur when?

a) first fit is used

b) best fit is used

c) worst fit is used

d) no matter which algorithm is used, it will always occur

Answer: no matter which algorithm is used, it will always occur


19. External fragmentation exists when?

a) enough total memory exists to satisfy a request but it is not contiguous

b) the total memory is insufficient to satisfy a request

c) a request cannot be satisfied even when the total memory is free

d) none of the mentioned

Answer: enough total memory exists to satisfy a request but it is not contiguous


20. What is the operating system?

a) in the low memory

b) in the high memory

c) either low or high memory (depending on the location of interrupt vector)

d) none of the mentioned

Answer: either low or high memory (depending on the location of interrupt vector)




Comments